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The HardwareThe problem with alphanumeric LEDs is that they have a bunch of segments - 16 in these displays' case - all of which need to be switched separately. This design only needs 12 of the 16 segments, so that drops the requirement off a bit. However, there are 4 displays in the clock, which means to control the segments directly, I'd need 48 I/O pins. No chip I own has that! |
Roman Numeral Clock Project |
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The Magic of Multiplexing
Imagine that there is such a thing as a 4-segment LED display with an anode shared by all the segment lamps. To control two displays separately with a PIC, you could wire it as shown on the left. The anodes are tied to the positive voltage rail, and each segment gets its own current limiting resistor. Each also gets a dedicated PIC I/O pin to control it. When the pin is brought low, current can flow and the segment lights. I call this configuration “direct drive”. Direct driving m displays with n segments takes m×n I/O pins, so this example takes 2 × 4 = 8 I/O pins.
The multiplexed setup looks like the schematic on the right. Now each display's corresponding segments are wired together and they share a current-limiting resistor. If the anodes were still tied high, bringing a segment control pin low would light the same segment on both displays. So, we also control the anodes. This is going to require a transistor, because a PIC can't source enough current through an I/O pin to power a whole display. For switching power to a load, you use a PNP transistor - so now, if a display's anode control I/O pin is brought low, the display is enabled because the transistor allows current to flow. When a segment control pin is brought low, the segment lights only on enabled displays. |
The displays I'm using were surplus and the dealer doesn't have them anymore. They're obsoleted by the manufacturer, and while newer displays with the same pinout exist, it seems unlikely people would be able to find them. Because of this, I haven't supplied the PCB artwork or parts list for this project. If you want them, email me and we'll discuss it over a cup of electronic coffee. |
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The trick is that you only enable one display at a time, and that way all the displays can be showing different segment patterns. If you switch among the displays fast enough, the viewer's persistence of vision will make it look as though they're all on simultaneously. So even though multiplexing requires more complex hardware and software, there's a big payoff: for m displays with n segments, you only need m+n I/O pins where direct driving would take m×n. For this toy example the gain is 2 pins. For the Roman Numeral Clock the requirement drops from 48 to 16 I/O pins. Another consideration with multiplexing is that the apparent brightness of the displays drops off, relative to direct-driven displays, since they're only lit part of the time. The proportion of time they spend lit is called “duty cycle”, and the lower the duty cycle, the dimmer the display. You can correct for this by driving them at a higher current. But how much higher? |
LED multiplexing is similar to way television and computer monitors work - and it accounts for why LED clocks look all swimmy on TV, since the TV camera's rate of updating the picture is a little bit out of sync with the clock's display. |
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LED Duty TestOnline, it's common to see the assertion that if you're multiplexing m LED displays, each must use m times the current that it would if it were steadily illuminated. However, one display data sheet I have touts multiplexing as a big win because apparent brightness is higher for average current than a steady display. I cobbled up a circuit to show how brightness varies with duty cycle, given LEDs using the same current. |
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As it turns out, this experiment was fun but ended up meaning little - the displays I used, driven at 1/4 duty, are dim. Even with no current-limiting resistor. At some point I may experiment with higher voltage, but I'm not sure it'd help. |
My brightness diagram in this table is based on the assumption that the brightness axis of the HSB color model is meaningful. Unbelievably nasty holy wars rage on the 'net about things like this, and don't ever get people started about gamma correction. | |||||
More transistorsCurrent does get to be a concern. A PIC pin can sink 25 mA, but at a low duty cycle a display segment is going to need more than that; I figured 40mA ought to do the trick. So, every segment is going to need its own driver transistor. The anode transistor has to be able to supply all the current needed by the maximum number of simultaneously lit segments on one display. Since this clock will have up to 10 segments lit at 40mA each, I needed PNP transistors that could handle 400mA or more; the local electronics shop had a box of surplus transistors called BF421s, and their data sheet alleged they could handle half an amp. |
When you're switching a load to ground, you use a NPN transistor, and here the trusty 2N2222A will work just fine. The 2222A is widely available, it's cheap, and handles enough current for almost all my needs. I bought a bag of 100 of them awhile back and have no cause to regret it. |
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Shifting the I/O burdenMultiplexing reduces the I/O pin count from 48 to 16, which is a great step. Still, I'd like to build this clock using a 16F628, and those only have 16 I/O pins. How can the pin count be dropped even further to allow for buttons and a real-time clock chip? Once again we can trade higher software complexity and lower speed for a tighter pin budget. Enter the CD4094, a type of shift register. It's a SIPO, which means Serial In, Parallel Out. It can take as input a stream of 8 bits given one at a time, then present them across 8 output pins simultaneously. To do this you only need a data pin, a shift clock pin, and a “strobe” pin. So, with 3 I/O pins, you can output 8 bits. But it gets better - you can chain 4094s end-to-end and have as long a shift register as you want! The Roman Numeral Clock needs 16 bits output - 4 for the anodes, 12 for the cathodes - so two 4094s ought to be able to do the job. Our 16-pin requirement is now down to 3! One problem with the 4000-family chips is that they can only source or sink about 1 milliamp per pin. There's no way they can drive the display cathodes, and the anodes are even worse. This is no problem for this project, since it needs driver transistors anyway. It's good to be mindful of current requirements, especially when you're used to dealing with hefty chips like the PICs which can source or sink 25 mA on a pin.
This does add one wrinkle to the design. The gain of the BF421 anode transistors is too low to take 1 mA through the base and deliver 400mA through the collector. This can be solved by cascading two transistors. A 2222A can sink enough current to allow the BF421 to do its job - see the picture to the right for the setup. This also means that the anode logic sense has flipped; now a high bit enables the anode. |
Actually, 16F628s only have 15 I/O pins and one input-only pin (RA5). | |||||
The big pictureDriving a clock display is a pretty complicated task if you mean to do it with few I/O pins. 240 times a second or so, we have to assemble 16 bits corresponding to the states of all the anode and cathode drivers and shovel them out to the shift registers. This is exactly the kind of thing that's made easy by turning it into a software problem. But before we can write any software, we need the hardware, and breadboarding this circuit would be a nightmare. Time for a circuit board! |
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